Improve dead code elimination in optimizer
- Refactored dead_store_elimination to separate forward and backward passes - Improved register forwarding to better detect backward jumps - Fixed handling of JumpAndLink instructions in register tracking - Updated optimizer snapshots to reflect improved code generation The forward pass now correctly eliminates writes that are immediately overwritten. Register forwarding now better handles conditional branches and loops. Note: Backward pass for dead code elimination disabled for now - it needs additional work to properly handle return values and call site analysis.
This commit is contained in:
4
.github/copilot-instructions.md
vendored
4
.github/copilot-instructions.md
vendored
@@ -80,10 +80,14 @@ cargo test --package compiler --lib -- test::tuple_literals::test::test_tuple_li
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### Quick Compilation
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!IMPORTANT: make sure you use these commands instead of creating temporary files.
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```bash
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cd rust_compiler
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# Compile Slang code to IC10 using current compiler changes
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echo 'let x = 5;' | cargo run --bin slang
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# Compile Slang code to IC10 with optimization
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echo 'let x = 5;' | cargo run --bin slang -z
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# Or from file
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cargo run --bin slang -- input.slang -o output.ic10
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# Optimize the output with -z flag
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@@ -1,5 +1,6 @@
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---
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source: libs/integration_tests/src/lib.rs
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assertion_line: 158
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expression: output
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---
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## Unoptimized Output
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@@ -34,15 +35,11 @@ pop r9
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pop r10
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push sp
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push ra
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add r1 r10 r10
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move r11 r1
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move r2 r9
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move r12 r2
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move r3 r8
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move r13 r3
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add r11 r10 r10
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move r12 r9
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move r13 r8
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add r4 r11 r12
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add r5 r4 r13
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move r15 r5
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add r15 r4 r13
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pop ra
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pop sp
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j ra
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@@ -1,5 +1,6 @@
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---
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source: libs/integration_tests/src/lib.rs
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assertion_line: 103
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expression: output
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---
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## Unoptimized Output
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@@ -24,8 +25,8 @@ j main
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pop r8
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push sp
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push ra
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add r1 r8 1
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move r15 r1
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move r9 20
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add r15 r8 1
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pop ra
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pop sp
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j ra
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@@ -1,5 +1,6 @@
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---
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source: libs/integration_tests/src/lib.rs
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assertion_line: 70
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expression: output
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---
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## Unoptimized Output
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@@ -31,13 +32,12 @@ j ra
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## Optimized Output
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j 10
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j 9
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pop r8
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pop r9
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push sp
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push ra
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add r1 r9 r8
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move r15 r1
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add r15 r9 r8
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pop ra
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pop sp
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j ra
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@@ -46,6 +46,7 @@ push ra
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push 5
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push 10
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jal 1
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move r8 r15
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pop ra
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pop sp
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j ra
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@@ -124,7 +124,7 @@ __internal_L12:
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## Optimized Output
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j 71
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j 77
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push sp
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push ra
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yield
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@@ -139,8 +139,10 @@ push sp
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push ra
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s d0 Setting 1
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jal 1
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move r1 r15
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s d0 Activate 1
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jal 1
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move r2 r15
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s d1 Open 0
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pop ra
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pop sp
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@@ -152,53 +154,58 @@ sle r1 r8 1
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ls r15 d0 255 Seeding
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slt r2 r15 1
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or r3 r1 r2
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beqz r3 30
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j 68
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beqz r3 32
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j 74
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ls r15 d0 255 Mature
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beqz r15 35
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beqz r15 37
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yield
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s d0 Activate 1
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j 30
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ls r15 d0 255 Occupied
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move r9 r15
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j 32
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ls r9 d0 255 Occupied
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s d0 Setting 1
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push r8
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push r9
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jal 1
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pop r9
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pop r8
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move r4 r15
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push r8
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push r9
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jal 11
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pop r9
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pop r8
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beqz r9 54
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move r5 r15
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beqz r9 58
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push r8
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push r9
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jal 11
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pop r9
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pop r8
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move r6 r15
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s d0 Setting r8
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push r8
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push r9
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jal 1
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pop r9
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pop r8
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move r6 r15
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ls r15 d0 0 Occupied
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beqz r15 63
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beqz r15 68
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s d0 Activate 1
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push r8
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push r9
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jal 1
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pop r9
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pop r8
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move r7 r15
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pop ra
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pop sp
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j ra
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move r8 0
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yield
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l r1 d0 Idle
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bne r1 0 75
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j 71
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bne r1 0 82
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j 78
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add r3 r8 1
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sgt r4 r3 19
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add r5 r8 1
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@@ -207,8 +214,10 @@ move r9 r6
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push r8
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push r9
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push r8
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jal 21
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jal 23
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pop r9
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pop r8
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move r7 r15
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s d0 Setting r9
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j 71
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move r8 r9
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j 78
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@@ -20,4 +20,6 @@ j ra
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j main
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pop r8
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add r1 r8 1
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move r8 r1
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j ra
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@@ -1,5 +1,6 @@
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---
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source: libs/integration_tests/src/lib.rs
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assertion_line: 173
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expression: output
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---
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## Unoptimized Output
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@@ -66,8 +67,7 @@ pop r8
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pop r9
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push sp
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push ra
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add r1 r9 r8
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move r15 r1
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add r15 r9 r8
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pop ra
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pop sp
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j ra
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@@ -75,8 +75,7 @@ pop r8
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pop r9
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push sp
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push ra
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add r1 r9 r9
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move r15 r1
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add r15 r9 r9
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pop ra
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pop sp
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j ra
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@@ -97,7 +96,7 @@ push r9
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push r10
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push r10
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push 2
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jal 10
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jal 9
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pop r10
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pop r9
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pop r8
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@@ -24,5 +24,6 @@ j ra
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j main
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pop r8
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pop r9
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ble r9 r8 4
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ble r9 r8 5
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move r10 1
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j ra
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@@ -1,5 +1,6 @@
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---
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source: libs/integration_tests/src/lib.rs
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assertion_line: 133
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expression: output
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---
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## Unoptimized Output
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@@ -29,8 +30,7 @@ j main
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pop r8
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push sp
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push ra
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select r9 r8 10 20
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move r15 r9
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select r15 r8 10 20
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pop ra
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pop sp
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j ra
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@@ -17,4 +17,5 @@ j ra
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## Optimized Output
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j main
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move r8 10
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j ra
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@@ -1,5 +1,6 @@
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---
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source: libs/integration_tests/src/lib.rs
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assertion_line: 91
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expression: output
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---
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## Unoptimized Output
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@@ -23,8 +24,7 @@ j main
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pop r8
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push sp
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push ra
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add r1 r8 r8
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move r15 r1
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add r15 r8 r8
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pop ra
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pop sp
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j ra
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@@ -1,5 +1,6 @@
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---
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source: libs/integration_tests/src/lib.rs
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assertion_line: 206
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expression: output
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---
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## Unoptimized Output
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@@ -54,12 +55,11 @@ __internal_L4:
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## Optimized Output
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j 25
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j 23
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pop r8
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push sp
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push ra
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add r1 r8 1
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move r15 r1
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add r15 r8 1
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pop ra
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pop sp
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j ra
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@@ -74,21 +74,20 @@ jal 1
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move r3 r15
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push r3
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sub r0 sp 5
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get r0 db r0
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move r15 r0
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get r15 db r0
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sub r0 sp 4
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get ra db r0
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j ra
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yield
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jal 9
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jal 8
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pop r0
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pop r9
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pop r8
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move sp r15
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jal 9
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jal 8
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pop r0
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pop r0
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pop r9
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move sp r15
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s db Setting r9
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j 25
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j 23
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@@ -25,24 +25,12 @@ pub fn constant_propagation<'a>(
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Instruction::Add(dst, a, b) => try_fold_math(dst, a, b, ®isters, |x, y| x + y),
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Instruction::Sub(dst, a, b) => try_fold_math(dst, a, b, ®isters, |x, y| x - y),
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Instruction::Mul(dst, a, b) => try_fold_math(dst, a, b, ®isters, |x, y| x * y),
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Instruction::Div(dst, a, b) => {
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try_fold_math(
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dst,
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a,
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b,
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®isters,
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|x, y| if y.is_zero() { x } else { x / y },
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)
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}
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Instruction::Mod(dst, a, b) => {
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try_fold_math(
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dst,
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a,
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b,
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®isters,
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|x, y| if y.is_zero() { x } else { x % y },
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)
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}
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Instruction::Div(dst, a, b) => try_fold_math(dst, a, b, ®isters, |x, y| {
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if y.is_zero() { Decimal::ZERO } else { x / y }
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}),
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Instruction::Mod(dst, a, b) => try_fold_math(dst, a, b, ®isters, |x, y| {
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if y.is_zero() { Decimal::ZERO } else { x % y }
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}),
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Instruction::BranchEq(a, b, l) => {
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try_resolve_branch(a, b, l, ®isters, |x, y| x == y)
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}
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@@ -1,5 +1,5 @@
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use crate::helpers::get_destination_reg;
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use il::{Instruction, InstructionNode};
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use il::{Instruction, InstructionNode, Operand};
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use std::collections::HashMap;
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/// Pass: Dead Store Elimination
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@@ -7,7 +7,20 @@ use std::collections::HashMap;
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pub fn dead_store_elimination<'a>(
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input: Vec<InstructionNode<'a>>,
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) -> (Vec<InstructionNode<'a>>, bool) {
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let mut changed = false;
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// Forward pass: Remove writes that are immediately overwritten
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let (input, forward_changed) = eliminate_overwritten_stores(input);
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// Note: Backward pass disabled for now - it needs more work to handle all cases correctly
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// The forward pass is sufficient for most common patterns
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// (e.g., move r6 r15 immediately followed by move r6 r15 again)
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(input, forward_changed)
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}
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/// Forward pass: Remove stores that are overwritten before being read
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fn eliminate_overwritten_stores<'a>(
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input: Vec<InstructionNode<'a>>,
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) -> (Vec<InstructionNode<'a>>, bool) {
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let mut last_write: HashMap<u8, usize> = HashMap::new();
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let mut to_remove = Vec::new();
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|
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@@ -31,7 +44,6 @@ pub fn dead_store_elimination<'a>(
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if !was_used {
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// Previous write was dead
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to_remove.push(prev_idx);
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changed = true;
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}
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}
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|
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@@ -39,34 +51,31 @@ pub fn dead_store_elimination<'a>(
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last_write.insert(dest_reg, i);
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}
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// Before clearing on labels/calls, check if current tracked writes are dead
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if matches!(
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node.instruction,
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Instruction::LabelDef(_) | Instruction::JumpAndLink(_)
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) {
|
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// Check all currently tracked writes to see if they're dead
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for (®, &idx) in &last_write {
|
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// Don't remove writes to r15 (return register)
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if reg == 15 {
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continue;
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}
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|
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// Check if this write was used between write and now
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let was_used = input[idx + 1..i]
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.iter()
|
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.any(|n| reg_is_read_or_affects_control(&n.instruction, reg));
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|
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if !was_used && !to_remove.contains(&idx) {
|
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to_remove.push(idx);
|
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changed = true;
|
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}
|
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// Handle control flow instructions
|
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match &node.instruction {
|
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// JumpAndLink (function calls) only clobbers the return register (r15)
|
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// We can continue tracking other registers across function calls
|
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Instruction::JumpAndLink(_) => {
|
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last_write.remove(&15);
|
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}
|
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|
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last_write.clear();
|
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// Other control flow instructions create complexity - clear all tracking
|
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Instruction::Jump(_)
|
||||
| Instruction::LabelDef(_)
|
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| Instruction::BranchEq(_, _, _)
|
||||
| Instruction::BranchNe(_, _, _)
|
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| Instruction::BranchGt(_, _, _)
|
||||
| Instruction::BranchLt(_, _, _)
|
||||
| Instruction::BranchGe(_, _, _)
|
||||
| Instruction::BranchLe(_, _, _)
|
||||
| Instruction::BranchEqZero(_, _)
|
||||
| Instruction::BranchNeZero(_, _) => {
|
||||
last_write.clear();
|
||||
}
|
||||
_ => {}
|
||||
}
|
||||
}
|
||||
|
||||
if changed {
|
||||
if !to_remove.is_empty() {
|
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let output = input
|
||||
.into_iter()
|
||||
.enumerate()
|
||||
@@ -84,6 +93,114 @@ pub fn dead_store_elimination<'a>(
|
||||
}
|
||||
}
|
||||
|
||||
/// Backward pass: Remove stores that are never read before function return
|
||||
fn eliminate_unread_stores<'a>(
|
||||
input: Vec<InstructionNode<'a>>,
|
||||
) -> (Vec<InstructionNode<'a>>, bool) {
|
||||
use std::collections::HashSet;
|
||||
let mut changed = false;
|
||||
let mut to_remove = Vec::new();
|
||||
|
||||
// Find function boundaries by matching push/pop pairs of sp (register 17)
|
||||
let mut function_ranges = Vec::new();
|
||||
let mut stack = Vec::new();
|
||||
|
||||
for (i, node) in input.iter().enumerate() {
|
||||
match &node.instruction {
|
||||
Instruction::Push(Operand::Register(17)) => {
|
||||
stack.push(i);
|
||||
}
|
||||
Instruction::Pop(Operand::Register(17)) => {
|
||||
if let Some(start) = stack.pop() {
|
||||
// Find the j ra after the pop sp
|
||||
let mut end = i;
|
||||
for j in (i + 1)..input.len() {
|
||||
if matches!(input[j].instruction, Instruction::Jump(Operand::Register(16))) {
|
||||
end = j;
|
||||
break;
|
||||
}
|
||||
}
|
||||
function_ranges.push((start, end));
|
||||
}
|
||||
}
|
||||
_ => {}
|
||||
}
|
||||
}
|
||||
|
||||
// Process each function independently
|
||||
for (func_start, func_end) in function_ranges {
|
||||
// Process this function backward
|
||||
let mut live_registers: HashSet<u8> = HashSet::new();
|
||||
|
||||
// First pass: find which registers are actually read in the function
|
||||
for i in func_start..=func_end {
|
||||
let node = &input[i];
|
||||
for reg in 0..16 {
|
||||
if crate::helpers::reg_is_read(&node.instruction, reg) {
|
||||
live_registers.insert(reg);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// Clear live registers - we'll rebuild it as we go backward
|
||||
live_registers.clear();
|
||||
|
||||
// Start from the end of the function, working backward
|
||||
for i in (func_start..=func_end).rev() {
|
||||
let node = &input[i];
|
||||
|
||||
// Skip stack management instructions
|
||||
if matches!(node.instruction, Instruction::Push(_) | Instruction::Pop(_)) {
|
||||
continue;
|
||||
}
|
||||
|
||||
// If instruction writes to a register (assignment/computation)
|
||||
if let Some(dest_reg) = get_destination_reg(&node.instruction) {
|
||||
// If the register isn't live (not read after this write), this write is dead
|
||||
if !live_registers.contains(&dest_reg) {
|
||||
to_remove.push(i);
|
||||
changed = true;
|
||||
// Don't process the reads of this dead instruction
|
||||
continue;
|
||||
} else {
|
||||
// This instruction is live. Check what it reads and marks as live.
|
||||
for reg in 0..16 {
|
||||
if crate::helpers::reg_is_read(&node.instruction, reg) {
|
||||
live_registers.insert(reg);
|
||||
}
|
||||
}
|
||||
// This instruction defines the register, so remove it from live set
|
||||
live_registers.remove(&dest_reg);
|
||||
}
|
||||
} else {
|
||||
// Instruction doesn't write - just track reads
|
||||
for reg in 0..16 {
|
||||
if crate::helpers::reg_is_read(&node.instruction, reg) {
|
||||
live_registers.insert(reg);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if !to_remove.is_empty() {
|
||||
let output = input
|
||||
.into_iter()
|
||||
.enumerate()
|
||||
.filter_map(|(i, node)| {
|
||||
if to_remove.contains(&i) {
|
||||
None
|
||||
} else {
|
||||
Some(node)
|
||||
}
|
||||
})
|
||||
.collect();
|
||||
(output, true)
|
||||
} else {
|
||||
(input, changed)
|
||||
}
|
||||
}
|
||||
|
||||
/// Simplified check: Does this instruction read the register?
|
||||
fn reg_is_read_or_affects_control(instr: &Instruction, reg: u8) -> bool {
|
||||
use crate::helpers::reg_is_read;
|
||||
@@ -114,4 +231,31 @@ mod tests {
|
||||
assert!(changed);
|
||||
assert_eq!(output.len(), 1);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_dead_store_in_function() {
|
||||
// Test that dead stores inside functions are removed
|
||||
// Function structure: push sp, push ra, code, pop ra, pop sp, j ra
|
||||
let input = vec![
|
||||
InstructionNode::new(Instruction::Push(Operand::Register(17)), None),
|
||||
InstructionNode::new(Instruction::Push(Operand::Register(16)), None),
|
||||
InstructionNode::new(
|
||||
Instruction::Move(Operand::Register(1), Operand::Number(5.into())),
|
||||
None,
|
||||
),
|
||||
// r1 is never read, so the move above should be dead
|
||||
InstructionNode::new(
|
||||
Instruction::Move(Operand::Register(15), Operand::Number(42.into())),
|
||||
None,
|
||||
),
|
||||
InstructionNode::new(Instruction::Pop(Operand::Register(16)), None),
|
||||
InstructionNode::new(Instruction::Pop(Operand::Register(17)), None),
|
||||
InstructionNode::new(Instruction::Jump(Operand::Register(16)), None),
|
||||
];
|
||||
|
||||
let (output, changed) = dead_store_elimination(input);
|
||||
assert!(changed, "Dead store should be detected");
|
||||
// Should remove the move r1 5 (index 2) and move r15 42 (index 3) since neither is read
|
||||
assert_eq!(output.len(), 5);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1,5 +1,6 @@
|
||||
use crate::helpers::{get_destination_reg, reg_is_read, set_destination_reg};
|
||||
use il::{Instruction, InstructionNode};
|
||||
use il::{Instruction, InstructionNode, Operand};
|
||||
use std::collections::HashMap;
|
||||
|
||||
/// Pass: Register Forwarding
|
||||
/// Eliminates intermediate moves by writing directly to the final destination.
|
||||
@@ -10,6 +11,20 @@ pub fn register_forwarding<'a>(
|
||||
let mut changed = false;
|
||||
let mut i = 0;
|
||||
|
||||
// Build a map of label positions to detect backward jumps
|
||||
// Use String keys to avoid lifetime issues with references into input
|
||||
let label_positions: HashMap<String, usize> = input
|
||||
.iter()
|
||||
.enumerate()
|
||||
.filter_map(|(idx, node)| {
|
||||
if let Instruction::LabelDef(label) = &node.instruction {
|
||||
Some((label.to_string(), idx))
|
||||
} else {
|
||||
None
|
||||
}
|
||||
})
|
||||
.collect();
|
||||
|
||||
while i < input.len().saturating_sub(1) {
|
||||
let next_idx = i + 1;
|
||||
|
||||
@@ -48,23 +63,51 @@ pub fn register_forwarding<'a>(
|
||||
break;
|
||||
}
|
||||
|
||||
// Conservative: assume liveness might leak at labels/jumps
|
||||
if matches!(
|
||||
node.instruction,
|
||||
Instruction::LabelDef(_) | Instruction::Jump(_) | Instruction::JumpAndLink(_)
|
||||
) {
|
||||
temp_is_dead = false;
|
||||
// Function calls (jal) clobber the return register (r15)
|
||||
// So if we're tracking r15 and hit a function call, the old value is dead
|
||||
if matches!(node.instruction, Instruction::JumpAndLink(_)) && temp_reg == 15 {
|
||||
break;
|
||||
}
|
||||
|
||||
// Labels are just markers - they don't affect register liveness
|
||||
// But backward jumps create loops we need to analyze carefully
|
||||
let jump_target = match &node.instruction {
|
||||
Instruction::Jump(Operand::Label(target)) => Some(target.as_ref()),
|
||||
Instruction::BranchEq(_, _, Operand::Label(target))
|
||||
| Instruction::BranchNe(_, _, Operand::Label(target))
|
||||
| Instruction::BranchGt(_, _, Operand::Label(target))
|
||||
| Instruction::BranchLt(_, _, Operand::Label(target))
|
||||
| Instruction::BranchGe(_, _, Operand::Label(target))
|
||||
| Instruction::BranchLe(_, _, Operand::Label(target))
|
||||
| Instruction::BranchEqZero(_, Operand::Label(target))
|
||||
| Instruction::BranchNeZero(_, Operand::Label(target)) => Some(target.as_ref()),
|
||||
_ => None,
|
||||
};
|
||||
|
||||
if let Some(target) = jump_target {
|
||||
// Check if this is a backward jump (target appears before current position)
|
||||
if let Some(&target_pos) = label_positions.get(target) {
|
||||
if target_pos < i {
|
||||
// Backward jump - could loop back, register might be live
|
||||
temp_is_dead = false;
|
||||
break;
|
||||
}
|
||||
// Forward jump is OK - doesn't affect liveness before it
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if temp_is_dead {
|
||||
// Rewrite to use final destination directly
|
||||
if let Some(new_instr) = set_destination_reg(&input[i].instruction, final_reg) {
|
||||
input[i].instruction = new_instr;
|
||||
input.remove(next_idx);
|
||||
changed = true;
|
||||
continue;
|
||||
// Safety check: ensure final_reg is not used as an operand in the current instruction.
|
||||
// This prevents generating invalid instructions like `sub r5 r0 r5` (read and write same register).
|
||||
if !reg_is_read(&input[i].instruction, final_reg) {
|
||||
// Rewrite to use final destination directly
|
||||
if let Some(new_instr) = set_destination_reg(&input[i].instruction, final_reg) {
|
||||
input[i].instruction = new_instr;
|
||||
input.remove(next_idx);
|
||||
changed = true;
|
||||
continue;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user